*	equates
	opt	D	include symbol table

UART	equ	$FFF801	UART address space begin
*                                      (odd address because it is wired
*                                       into lines D0-D7 )
MR1A	equ	0	Mode register A (R/W)
MR2A	equ	0	Mode register A (R/W)
SRA	equ	2	Status register A
CSRA	equ	2	Clock select register A
CRA	equ	4	Command register A
RBA	equ	6	Receiver buffer A
TBA	equ	6	Transmitter buffer A
IPCR	equ	8	Input port change register
ACR	equ	8	Auxiliary control register
ISR	equ	10	Interrupt status register
IMR	equ	10	Interrupt mask register
MS_Count	equ	12	MS byte of counter in counter mode
CTUR	equ	12	Counter/timer upper register
LS_Count	equ	14	LS byte of counter in counter mode
CTLR	equ	14	Counter/timer lower register
MR1B	equ	16	Mode register B (R/W)
MR2B	equ	16	Mode register B (R/W)
SRB	equ	18	Status register B
CSRB	equ	18	Clock select register B
CRB	equ	20	Command register B
RBB	equ	22	Receiver buffer B
TBB	equ	22	Transmitter buffer B
IVR	equ	24	Interrupt vecter register (R/W)
In_Port	equ	26	Unlatched input port
OPCR	equ	26	Output port configuration register
Start_Ctr	equ	28	Start counter command
OPR_set	equ	28	Output port register bit set command
Stop_Ctr	equ	30	Stop counter command
OPR_reset	equ	30	Output port register bit reset command
Uart_Vector	equ	64

Stack	equ	$3FFFE	end of RAM
Progstart	equ	$400
Start_scan	equ	$20000
Scan_len	equ	65534	# words of RAM
*  (should be 65536 but I'm a boundary chicken )

LF	equ	$0A
CR	equ	$0D
	page	vector table

	org	$00000

	dc.l	Stack	initial supervisor stack
	dc.l	Progstart	initial program counter
	dc.l	Berr_trap	bus error handler
	dc.l	Addr_trap	address error trap
	dc.l	Bad_Inst	illegal instruction trap
	dc.l	Bad_Vect	zero divide trap
	dc.l	Bad_Vect	bounds check trap
	dc.l	Bad_Vect	overflow trap
	dc.l	Bad_Vect	priviledge violation
	dc.l	Bad_Vect	instruction trace handler
	dc.l	A_Line	$Axxx opcode trap
	dc.l	F_Line	$Fxxx opcode trap

	org	Uart_Vector*4	first user vector
	dc.l	Uart_Int	user vector for DUART
	page	main program

	org	Progstart

Start	move.w	#$2000,SR	allow all interupts
	clr.l	d5	pass #
	move.l	d5,a4	total error count

	lea	Test_Loop,a6
	jmp	Reset_Uart	set it up for transmission

Test_Loop	lea	Pass_Mess,a0
	lea	Ret_1,a6
	addq.l	#1,d5	update pass count
	jmp	Out_String	print 'This is pass #'

Ret_1	lea	Ret_1b,a6
	move.l	d5,d0
	jmp	Hex_32	print pass #

Ret_1b	lea	Ret_1c,a6
	lea	CRLF,a0
	jmp	Out_String	line feed

Ret_1c	lea	Err_Mess,a0
	lea	Ret_1d,a6
	jmp	Out_String	print 'Total errors='

Ret_1d	lea	Ret_1e,a6
	move.l	a4,d0
	jmp	Hex_32	print the total number of errors

Ret_1e	lea	Ret_2,a6
	lea	CRLF,a0
	jmp	Out_String	line feed

Ret_2	lea	Start_scan,a3	first Ram location to test
	move.w	#Scan_len-1,d3	number of words to test
	clr.l	d4

Fill	move.w	d4,d0
	eor.w	d5,d0	goof up the bit pattern on each pass
	move.w	d0,0(a3,d4.l)
	addq.l	#2,d4
	dbf	d3,Fill

	move.w	#13,d2	kill about 1 second
wait_loop	moveq.l	#-1,d1	...to see if it has any affect
inner_loop	dbf	d1,inner_loop	...on refresh
	dbf	d2,wait_loop

	move.w	#Scan_len-1,d3
	clr.l	d4

Scan	lea	0(a3,d4.l),a5	effective address
	lea	Ret_scan,a7
	move.w	d4,d6
	eor.w	d5,d6	goof up the bit pattern
	move.w	(a5),d7
	cmp.w	d6,d7
	bne 	Report

Ret_scan	addq.l	#2,d4	advance offset
	dbf	d3,Scan
	jmp	Test_Loop


Pass_Mess	dc.b	CR,LF
	dc.b	'This is pass #'
	dc.b	0
CRLF	dc.b	CR,LF,0
Err_Mess	dc.b	'Total errors=',0
	page	error report

* This routine gives the report of an error.
* Its expects this input:
*     Location : a5
*     Expected : d6
*     Received : d7
* d0,d1,d2,a0,a4 and a6 are affected.
* It returns to (a7) when done.

Report	lea	Rep_1,a6
	move.w	d6,d0
	jmp	Hex_16	print test value

Rep_1	lea	Rep_2,a6
	lea	Mess2,a0
	jmp	Out_string	print ' was written to '

Rep_2	lea	Rep_3,a6
	move.l	a5,d0
	jmp	Hex_32	print address

Rep_3	lea	Rep_4,a6
	lea	Mess3,a0
	jmp	Out_string	print ' and '

Rep_4	lea	Rep_5,a6
	move.w	d7,d0	get what ram says is there
	jmp	Hex_16

Rep_5	lea	Rep_6,a6
	lea	Mess4,a0
	jmp	Out_string	print ' came back.'

Rep_6	addq.l	#1,a4	add 1 to total error count
	jmp	(a7)


Mess2	dc.b	' was written to ',0
Mess3	dc.b	' and ',0
Mess4	dc.b	' came back.',CR,LF,0
	page	Uart subroutines

*************************************************************************
* Subroutine:   Reset_Uart
* Action    :   detailed below
* Input     :   none
* Output    :   none
* Changes   :   flags
* Note ---  :  Returns to (a6) when done
*
* This routine resets the UART to the following conditions:
*    1) The channel A and B receivers and transmitters will be disabled.
*    2) All UART fifos will be cleared.
*    3) All status bits in SRA, SRB and IPCR will be reset.
*    3) OP7-OP0 will be set for general purpose output
*    4) OPR will be zero (so OP7-OP0 will be $FF)
*    5) Timer/counter will be stopped
*    6) The interrupt vector will be set to $0F.
*************************************************************************

Reset_Uart	move.b	#%00001010,d0	disable transmit & receive
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#%00100000,d0	reset receiver
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#%00110000,d0	reset transmitter
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#%01000000,d0	reset error status
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#%01010000,d0	reset break change bit in ISR
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#%01110000,d0	stop sending break (if doing so)
	move.b	d0,UART+CRA
	move.b	d0,UART+CRB
	move.b	#0,UART+IMR	clear interrupt mask register
	move.b	UART+IPCR,d0	reading clears the input port.
	move.b	#-1,UART+OPR_reset	clear all output bits
	move.b	#0,UART+OPCR	output port configuration register
	move.b	UART+Stop_ctr,d0	stop timer
            move.b	#$0F,UART+IVR	set interrupt vector to uninitialized


*************************************************************************
* Subroutine:   continuation of above
* Action    :   detailed below
* Input     :   none
* Output    :   none
* Changes   :   flags
* Note ---  :  Returns to (a6) when done
*
* This routine sets up the UART channels with default values.   These are:
*  1) All receivers and transmitters at 9600 baud
*  2) Full duplex on channel A and channel B
*  3) Character mode
*  4) Forced mark parity
*  5) 8 bits per character
*  6) 1 stop bit
*  7) The counter/timer disabled
*  8) Interrupts on break received from channel A
*  9) Interrupts vector to vector 64
*************************************************************************

	move.b	#Uart_Vector,UART+IVR		set interrupt vector
	move.b	#%00010000,UART+CRA	move pointer to MR1A
	move.b	#%00001111,UART+MR1A	forced mark parity, 8 data bits
	move.b	#%00000111,UART+MR2A	full duplex, 1 stop bit
	move.b	#%00010000,UART+CRB	move pointer to MR1B
	move.b	#%00001111,UART+MR1B	forced mark parity, 8 data bits
	move.b	#%00000111,UART+MR2B	full duplex, 1 stop bit
	move.b	#%10000000,UART+ACR
	move.b	#%10111011,UART+CSRA	9600 baud, channel A
	move.b	#%10111011,UART+CSRB	9600 baud, channel B
	move.b	#%00000100,UART+IMR	interrupt on break from channel A
	move.b	#%00000101,UART+CRA	enable receiver,transmitter
	move.b	#%00000101,UART+CRB	enable receiver,transmitter

	jmp	(a6)
	page	Out_String

* This routine accepts a pointer to a message in a0.
* d0 and a0 get changed.
* It returns to (a6) when done.

Out_String	move.b	(a0)+,d0	get next character
	beq.s	Out_Xit

Out_Wait	btst	#2,UART+SRA
	beq	Out_Wait	xmit buffer full
	move.b	d0,UART+TBA	print char
	bra	Out_String

Out_Xit	jmp	(a6)
	page	Hex_32, Hex_16

* this subroutine accepts a 32 bit value in d0 and prints out its
* contents in hex.
* d1 and d2 are lost.
* The routine returns to (a6) when done.

Hex_32	move.w	#7,d2	# nibbles (-1) to print out

MH_Loop	rol.l	#4,d0	get next sig nibble in lower part
	move.b	d0,d1
	and.w	#$f,d1	leave only nibble
	move.b	XLAT(PC,d1.w),d1	look up ascii equivalent

M1_o1	btst	#2,UART+SRA	ok to send digit?
	beq	M1_o1
	move.b	d1,UART+TBA	print it out

	dbf	d2,MH_Loop
	jmp	(a6)



* this subroutine accepts a 16 bit value in d0 and prints out its
* contents in hex.
* d1 and d2 are lost.
* The routine returns to (a6) when done.

Hex_16	move.w	#3,d2	# nibbles (-1) to print out

MH_16Loop	rol.w	#4,d0	get next sig nibble in lower part
	move.b	d0,d1
	and.w	#$f,d1	leave only nibble
	move.b	XLAT(PC,d1.w),d1	look up ascii equivalent

M16_o1	btst	#2,UART+SRA	ok to send digit?
	beq	M16_o1
	move.b	d1,UART+TBA	print it out

	dbf	d2,MH_16Loop
	jmp	(a6)

XLAT	dc.b	'0123456789ABCDEF'
	page	traps

Uart_Int	move.b	#$50,CRA	clear break flag
Int_Wait	btst	#2,UART+ISR	wait for end of break
	beq	Int_Wait
* now pretend reset has been done
	reset
	move.l	$0,SP
	move.l	$4,a0
	jmp	(a0)

Addr_trap	lea	TMess1,a0
	lea	Addr_trap,a6
	jmp	Out_String	write message

Berr_trap	lea	TMess2,a0
	lea	Berr_trap,a6
	jmp	Out_String	write message

Bad_Vect	lea	TMess3,a0
	lea	Bad_Vect,a6
	jmp	Out_String	write message

Bad_Inst	lea	TMess4,a0
	lea	Bad_Inst,a6
	jmp	Out_String	write message

F_Line	lea	TMess5,a0
	lea	F_Line,a6
	jmp	Out_String	write message

A_Line	lea	TMess6,a0
	lea	A_Line,a6
	jmp	Out_String	write message

TMess1	dc.b	'Address error trap',CR,LF,0
TMess2	dc.b	'Bus error trap',CR,LF,0
TMess3	dc.b	'Bad vector trap',CR,LF,0
TMess4	dc.b	'Bad instruction trap',CR,LF,0
TMess5	dc.b	'F-line trap',CR,LF,0
TMess6	dc.b	'A-line trap',CR,LF,0